Fabrication of quantum dots in undoped Si/Si$_{0.8}$Ge$_{0.2}$ heterostructures using a single metal-gate layer

TL;DR

This paper demonstrates the fabrication of quantum dots in Si/SiGe heterostructures with a single metal-gate layer, simplifying device architecture while exploring effects of Ge concentration and quantum confinement.

Contribution

It introduces a novel fabrication method for quantum dots using only one metal-gate layer in Si/SiGe heterostructures with lower Ge content, expanding design possibilities.

Findings

Quantum dots can be tuned from single to double dots with a single gate layer.

Higher threshold voltages are observed in narrower channels due to quantum confinement and disorder.

Lower Ge ratio affects the operational gate bias range, influencing device design.

Abstract

Enhancement-mode Si/SiGe electron quantum dots have been pursued extensively by many groups for \revEdit{their} potential in quantum computing. Most of the reported dot designs utilize multiple metal-gate layers and use Si/SiGe heterostructures with Ge concentration close to 30\%. Here we report the fabrication and low-temperature characterization of quantum dots in Si/Si$_{0.8}$Ge$_{0.2}$ heterostructures using only one metal-gate layer. We find that the threshold voltage of a channel narrower than 1 $\mu$m increases as the width decreases. The higher threshold can be attributed to the combination of quantum confinement and disorder. We also find that the lower Ge ratio used here leads to a narrower operational gate bias range. The higher threshold combined with the limited gate bias range constrains the device design of lithographic quantum dots. We incorporate such considerations in our device design and demonstrate a quantum dot that can be tuned from a single dot to a double dot. The device uses only a single metal-gate layer, greatly simplifying device design and fabrication.