Ancilla-Input and Garbage-Output Optimized Design of a Reversible Quantum Integer Multiplier

TL;DR

This paper introduces a novel reversible quantum integer multiplier design that eliminates garbage qubits and reduces ancilla qubits significantly, improving efficiency for quantum computing applications.

Contribution

It presents a garbage-free, ancilla-optimized quantum multiplier using a modified shift-and-add approach suitable for reversible quantum computing.

Findings

Zero garbage qubits produced

Ancilla qubits reduced by 60-90%

Improved efficiency over existing designs

Abstract

A reversible logic has application in quantum computing. A reversible logic design needs resources such as ancilla and garbage qubits to reconfigure circuit functions or gate functions. The removal of garbage qubits and ancilla qubits are essential in designing an efficient quantum circuit. In the literature, there are multiple designs that have been proposed for a reversible multiplication operation. A multiplication hardware is essential for the circuit design of quantum algorithms, quantum cryptanalysis, and digital signal processing (DSP) applications. The existing designs of reversible quantum integer multipliers suffer from redundant garbage qubits. In this work, we propose a reversible logic based, garbage-free and ancilla qubit optimized design of a quantum integer multiplier. The proposed quantum integer multiplier utilizes a novel add and rotate methodology that is specially suitable for a reversible computing paradigm. The proposed design methodology is the modified version of a conventional shift and add method. The proposed design of the quantum integer multiplier incorporates add or no operation based on multiplier qubits and followed by a rotate right operation. The proposed design of the quantum integer multiplier produces zero garbage qubits and shows an improvement ranging from 60% to 90% in ancilla qubits count over the existing work on reversible quantum integer multipliers.