Hysteretic phenomena in GFET: general theory and experiment

TL;DR

This paper develops a comprehensive theory explaining hysteretic behaviors in graphene FETs caused by external dipoles and interface states, aligning well with experimental data and aiding the design of advanced memory devices.

Contribution

It introduces a general analytical model for hysteresis in GFETs considering external dipoles and interface states, with experimental validation and implications for memory device development.

Findings

Hysteresis depends on dipole molecules and substrate type.

Increasing gate voltage sweep rate can eliminate hysteresis.

Transition from hysteresis to antihysteresis occurs at critical electric field Ec.

Abstract

We propose a general theory for the analytical description of versatile hysteretic phenomena in a graphene field effect transistor (GFET) allowing for the existence of the external dipoles on graphene free surface and the localized states at the graphene-surface interface. We demonstrated that the absorbed dipole molecules (e.g. dissociated or highly polarized water molecules) can cause hysteretic form of carrier concentration as a function of gate voltage and corresponding dependence of graphene conductivity in GFET on the substrate of different types, including the most common SiO2 and ferroelectric ones. It was shown that the increase of the gate voltage sweeping rate leads to the complete vanishing of hysteresis for GFET on SiO2 substrate, as well as for GFET on ferroelectric substrate for applied electric fields E less than the critical value Ec. For E>Ec the crossover from the hysteresis to antihysteresis takes place. These results well correlate with the available experimental data up to the quantitative agreement. Proposed model takes into consideration the carriers trapping from the graphene channel by the interface states and describes the antihysteresis in GFET on PZT substrate well enough. Obtained results clarify the fundamental principles of GFET operation as well as can be directly applied to describe the basic characteristics of advanced nonvolatile ultra-fast memory devices using GFET on versatile substrates.