Decision and optimization problems in the Unreliable-Circuit Logic
J. Rasga, C. Sernadas, P. Mateus, A. Sernadas
TL;DR
This paper analyzes decision and optimization problems in Unreliable-Circuit Logic (UCL), providing algorithms and complexity results for reasoning about circuits with unreliable gates and optimizing their reliability parameters.
Contribution
It introduces new decision and optimization problems in UCL, along with sound, complete algorithms and complexity analyses for these problems.
Findings
Algorithms for reliability bounds and success rate maximization
Complexity results for reliability decision problems
Enhanced reasoning tools for unreliable circuits
Abstract
The ambition constrained validity and the model witness problems in the logic UCL, for reasoning about circuits with unreliable gates, are analyzed. Moreover, two additional problems, motivated by the applications, are studied. One consists of finding bounds on the reliability rate of the gates that ensure that a given circuit has an intended success rate. The other consists of finding a reliability rate of the gates that maximizes the success rate of a given circuit. Sound and complete algorithms are developed for these problems and their computational complexity is studied.
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Taxonomy
TopicsFormal Methods in Verification · Machine Learning and Algorithms · Software Testing and Debugging Techniques