Roadmap to Majorana surface codes

TL;DR

This paper proposes a Majorana-based surface code architecture for fault-tolerant quantum computing, highlighting its advantages and detailing how to implement universal quantum gates using existing quantum device techniques.

Contribution

It introduces a novel Majorana surface code framework and demonstrates how to perform all necessary quantum operations with current topological superconductor/semiconductor technology.

Findings

Majorana surface codes enable fault-tolerant quantum computation.

Universal quantum gates can be realized with existing device techniques.

The architecture offers advantages in hardware realization and operation.

Abstract

Surface codes offer a very promising avenue towards fault-tolerant quantum computation. We argue that two-dimensional interacting networks of Majorana bound states in topological superconductor/semiconductor heterostructures hold several distinct advantages in that direction, both concerning the hardware realization and the actual operation of the code. We here discuss how topologically protected logical qubits in this Majorana surface code architecture can be defined, initialized, manipulated, and read out. All physical ingredients needed to implement these operations are routinely used in topologically trivial quantum devices. In particular, we show that by means of quantum interference terms in linear conductance measurements, composite single-electron pumping protocols, and gate-tunable tunnel barriers, the full set of quantum gates required for universal quantum computation can be implemented.