Design and Performance Analysis of Depletion-Mode InSb Quantum-Well Field-Effect Transistor for Logic Applications

TL;DR

This paper presents the design and analysis of a high-performance InSb quantum-well FET with optimized parameters, predicting exceptional high-speed and low-power capabilities suitable for advanced logic applications.

Contribution

The study introduces a quantum-corrected modeling approach for InSb QWFETs, demonstrating their potential for high-speed, low-power logic devices with specific optimized design parameters.

Findings

Electron mobility of 4.42 m2V-1s-1 predicted

Cut-off frequency of 374 GHz predicted

Maximum oscillation frequency of 645 GHz predicted

Abstract

The design of a 1 micrometer gate length depletion-mode InSb quantum-well field-effect transistor (QWFET) with a 10 nm-thick Al2O3 gate dielectric has been optimized using a quantum corrected self-consistent Schrodinger-Poisson (QCSP) and two dimensional drift-diffusion model. The model predicts a very high electron mobility of 4.42 m2V-1s-1 at Vg= 0V, a small pinch off gate voltage (Vp) of -0.25V, a maximum extrinsic transconductance (gm) of 4.94 S/mm and a drain current density of more than 6.04 A/mm. A short-circuit current-gain cut-off frequency (fT) of 374 GHz and a maximum oscillation frequency (fmax) of 645 GHz are predicted for the device. These characteristics make the device a potential candidate for low power, high-speed logic electronic device applications.