Parallelizing quantum circuit synthesis
Olivia Di Matteo, Michele Mosca

TL;DR
This paper introduces a parallel quantum circuit synthesis method using deterministic walks, significantly improving synthesis speed and confirming optimal gate counts for specific quantum circuits.
Contribution
It presents a novel parallel framework for quantum circuit synthesis based on deterministic walks, enabling more efficient synthesis of multi-qubit circuits.
Findings
Parallelization offers significant speedup in synthesis runtime.
Confirmed the 4-qubit 1-bit full adder has optimal T-count 7 and T-depth 3.
Applied the method to synthesize circuits with optimal T-count over Clifford+T gates.
Abstract
Quantum circuit synthesis is the process in which an arbitrary unitary operation is decomposed into a sequence of gates from a universal set, typically one which a quantum computer can implement both efficiently and fault-tolerantly. As physical implementations of quantum computers improve, the need is growing for tools which can effectively synthesize components of the circuits and algorithms they will run. Existing algorithms for exact, multi-qubit circuit synthesis scale exponentially in the number of qubits and circuit depth, leaving synthesis intractable for circuits on more than a handful of qubits. Even modest improvements in circuit synthesis procedures may lead to significant advances, pushing forward the boundaries of not only the size of solvable circuit synthesis problems, but also in what can be realized physically as a result of having more efficient circuits. We present…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
