Magnetic Skyrmions on a Two-Lane Racetrack

TL;DR

This paper proposes a multilane skyrmion racetrack memory design where skyrmions move in parallel lanes, with information encoded in lane number, offering a robust and efficient data storage solution.

Contribution

It introduces a novel multilane racetrack architecture for skyrmion memory, utilizing height profile control and skyrmion interactions for reliable data encoding.

Findings

Skyrmions can be confined to multiple lanes in a nanostrip.

Lane changes can be induced by current pulses.

The design enhances robustness and efficiency of skyrmion memory.

Abstract

Magnetic skyrmions are particle-like textures in the magnetization, characterized by a topological winding number. Nanometer-scale skyrmions have been observed at room temperature in magnetic multilayer structures. The combination of small size, topological quantization, and their efficient electric manipulation makes them interesting candidates for information carriers in high-performance memory devices. A skyrmion racetrack memory has been suggested where information is encoded in the distance between skyrmions moving in a one-dimensional nanostrip. Here, we propose an alternative design where skyrmions move in two (or more) parallel lanes and the information is stored in the lane number of each skyrmion. Such a multilane track can be constructed by controlling the height profile of the nanostrip. Repulsive skyrmion-skyrmion interactions in narrow nanostrips guarantee that skyrmions on different lanes cannot pass each other. Current pulses can be used to induce a lane change. Combining these elements provides a robust, efficient design of skyrmion-based storage devices.