A multilevel nonvolatile magnetoelectric memory based on memtranstor

TL;DR

This paper introduces a novel multilevel nonvolatile memory device based on controlling the magnetoelectric coefficient in multiferroic heterostructures, enabling efficient, nondestructive readout of multiple memory states at room temperature.

Contribution

It presents a new principle for multilevel nonvolatile memory utilizing the magnetoelectric coefficient states controlled by electric fields in multiferroics, demonstrated with experimental devices.

Findings

Successfully demonstrated 2-, 4-, and 8-level memory states.

Memory states are controlled by electric fields without destroying ferroelectric polarization.

Memory readout is nondestructive and highly efficient.

Abstract

The coexistence and coupling between magnetization and electric polarization in multiferroic materials provide extra degrees of freedom for creating next-generation memory devices. A variety of concepts of multiferroic or magnetoelectric memories have been proposed and explored in the past decade. Here we propose a new principle to realize a multilevel nonvolatile memory based on the multiple states of the magnetoelectric coefficient ({\alpha}) of multiferroics. Because the states of {\alpha} depends on the relative orientation between magnetization and polarization, one can reach different levels of {\alpha} by controlling the ratio of up and down ferroelectric domains with external electric fields. Our experiments in a device made of the PMN-PT/Terfenol-D multiferroic heterostructure confirm that the states of {\alpha} can be well controlled between positive and negative by applying selective electric fields. Consequently, two-level, four-level, and eight-level nonvolatile memory devices are demonstrated at room temperature. This kind of multilevel magnetoelectric memory retains all the advantages of ferroelectric random access memory but overcomes the drawback of destructive reading of polarization. In contrast, the reading of {\alpha} is nondestructive and highly efficient in a parallel way, with an independent reading coil shared by all the memory cells.