Metastability-Containing Circuits
Stephan Friedrichs, Matthias F\"ugger, Christoph Lenzen

TL;DR
This paper introduces a novel approach to contain metastability in digital circuits through logical masking, providing deterministic guarantees and a new hierarchy of computational power for masking registers.
Contribution
It proposes a time- and value-discrete model for metastability, enabling guaranteed containment and classification of computable functions with masking registers.
Findings
Metastability can be contained using logical masking techniques.
The model reproduces Marino's impossibility results.
Masking registers increase computational power over time.
Abstract
In digital circuits, metastability can cause deteriorated signals that neither are logical 0 or logical 1, breaking the abstraction of Boolean logic. Unfortunately, any way of reading a signal from an unsynchronized clock domain or performing an analog-to-digital conversion incurs the risk of a metastable upset; no digital circuit can deterministically avoid, resolve, or detect metastability (Marino, 1981). Synchronizers, the only traditional countermeasure, exponentially decrease the odds of maintained metastability over time. Trading synchronization delay for an increased probability to resolve metastability to logical 0 or 1, they do not guarantee success. We propose a fundamentally different approach: It is possible to contain metastability by fine-grained logical masking so that it cannot infect the entire circuit. This technique guarantees a limited degree of metastability…
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