A New Parallel Algorithm for Two-Pass Connected Component Labeling

TL;DR

This paper introduces PAREMSP, a scalable parallel two-pass connected component labeling algorithm that efficiently utilizes multi-core architectures, achieving significant speedups and linear scaling for large images without hardware-specific routines.

Contribution

The paper presents a novel parallel two-pass CCL algorithm, PAREMSP, employing REMSP for label equivalence, demonstrating high scalability and portability on shared memory systems.

Findings

Achieves speedups up to 20.1 with 24 cores.

Demonstrates linear scaling with increasing cores.

Does not rely on hardware-specific routines.

Abstract

Connected Component Labeling (CCL) is an important step in pattern recognition and image processing. It assigns labels to the pixels such that adjacent pixels sharing the same features are assigned the same label. Typically, CCL requires several passes over the data. We focus on two-pass technique where each pixel is given a provisional label in the first pass whereas an actual label is assigned in the second pass. We present a scalable parallel two-pass CCL algorithm, called PAREMSP, which employs a scan strategy and the best union-find technique called REMSP, which uses REM's algorithm for storing label equivalence information of pixels in a 2-D image. In the first pass, we divide the image among threads and each thread runs the scan phase along with REMSP simultaneously. In the second phase, we assign the final labels to the pixels. As REMSP is easily parallelizable, we use the parallel version of REMSP for merging the pixels on the boundary. Our experiments show the scalability of PAREMSP achieving speedups up to $20.1$ using $24$ cores on shared memory architecture using OpenMP for an image of size $465.20$ MB. We find that our proposed parallel algorithm achieves linear scaling for a large resolution fixed problem size as the number of processing elements are increased. Additionally, the parallel algorithm does not make use of any hardware specific routines, and thus is highly portable.