Splotch: porting and optimizing for the Xeon Phi
Timothy Dykes, Claudio Gheller, Marzia Rivi, Mel Krokos

TL;DR
This paper details the process of porting and optimizing the Splotch visualization algorithm for Intel's Xeon Phi coprocessor, highlighting performance improvements and comparisons with GPU implementations in high-performance computing environments.
Contribution
It introduces specific techniques for offloading data and modifying algorithms to leverage Xeon Phi's many-core and wide vector capabilities, enhancing visualization performance.
Findings
Significant performance gains on Xeon Phi compared to previous CPU implementations.
Effective utilization of Xeon Phi's wide vector units for visualization tasks.
Performance comparison showing Xeon Phi's advantages and limitations relative to GPU.
Abstract
With the increasing size and complexity of data produced by large scale numerical simulations, it is of primary importance for scientists to be able to exploit all available hardware in heterogenous High Performance Computing environments for increased throughput and efficiency. We focus on the porting and optimization of Splotch, a scalable visualization algorithm, to utilize the Xeon Phi, Intel's coprocessor based upon the new Many Integrated Core architecture. We discuss steps taken to offload data to the coprocessor and algorithmic modifications to aid faster processing on the many-core architecture and make use of the uniquely wide vector capabilities of the device, with accompanying performance results using multiple Xeon Phi. Finally performance is compared against results achieved with the GPU implementation of Splotch.
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Taxonomy
TopicsParallel Computing and Optimization Techniques · Advanced Data Storage Technologies · Computational Physics and Python Applications
