DiSquawk: 512 cores, 512 memories, 1 JVM
Foivos S. Zakkak, Polyvios Pratikakis

TL;DR
This paper presents a Java Virtual Machine implementation for a 512-core non-cache-coherent architecture, demonstrating scalability and correctness in adhering to the Java Memory Model through formal semantics.
Contribution
It introduces a scalable JVM implementation for non-cache-coherent architectures and formally proves its correctness relative to the Java Memory Model.
Findings
Implementation scales with the number of cores
Early evaluation shows promising performance
Formal semantics confirm correctness
Abstract
Trying to cope with the constantly growing number of cores per processor, hardware architects are experimenting with modular non-cache-coherent architectures. Such architectures delegate the memory coherency to the software. On the contrary, high productivity languages, like Java, are designed to abstract away the hardware details and allow developers to focus on the implementation of their algorithm. Such programming languages rely on a process virtual machine to perform the necessary operations to implement the corresponding memory model. Arguing about the correctness of such implementations is not trivial though. In this work we present our implementation of the Java Memory Model in a Java Virtual Machine targeting a 512-core non-cache-coherent memory architecture. We shortly discuss design decisions and present early evaluation results, which demonstrate that our implementation…
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Taxonomy
TopicsParallel Computing and Optimization Techniques · Distributed systems and fault tolerance · Logic, programming, and type systems
