GPU-based Real-time Triggering in the NA62 Experiment

TL;DR

This paper explores the implementation of GPU-based real-time processing for the low-level trigger system in the CERN NA62 experiment, addressing latency challenges and proposing solutions like NaNet for efficient data transfer.

Contribution

It introduces a GPU-based approach for real-time trigger primitives in the NA62 experiment, including novel algorithms and a FPGA-based network interface to meet strict latency requirements.

Findings

GPU processing increased trigger throughput

NaNet FPGA NIC reduced data transfer latency

Real-time trigger primitives successfully generated

Abstract

Over the last few years the GPGPU (General-Purpose computing on Graphics Processing Units) paradigm represented a remarkable development in the world of computing. Computing for High-Energy Physics is no exception: several works have demonstrated the effectiveness of the integration of GPU-based systems in high level trigger of different experiments. On the other hand the use of GPUs in the low level trigger systems, characterized by stringent real-time constraints, such as tight time budget and high throughput, poses several challenges. In this paper we focus on the low level trigger in the CERN NA62 experiment, investigating the use of real-time computing on GPUs in this synchronous system. Our approach aimed at harvesting the GPU computing power to build in real-time refined physics-related trigger primitives for the RICH detector, as the the knowledge of Cerenkov rings parameters allows to build stringent conditions for data selection at trigger level. Latencies of all components of the trigger chain have been analyzed, pointing out that networking is the most critical one. To keep the latency of data transfer task under control, we devised NaNet, an FPGA-based PCIe Network Interface Card (NIC) with GPUDirect capabilities. For the processing task, we developed specific multiple ring trigger algorithms to leverage the parallel architecture of GPUs and increase the processing throughput to keep up with the high event rate. Results obtained during the first months of 2016 NA62 run are presented and discussed.