Mathematical Modeling of General Inaccurate Adders
Zvi M. Kedem, Kirthi Krishna Muntimadugu

TL;DR
This paper introduces a comprehensive mathematical framework and fast algorithms for analyzing tradeoffs in inaccurate adders, aiding hardware design by quantifying accuracy versus resource savings.
Contribution
It provides a rigorous method and new algorithms for analyzing a broad class of inaccurate adders, expanding beyond previous narrow studies.
Findings
Developed a mathematically rigorous analysis method.
Created fast algorithms for key statistical measures.
Facilitated exploration of accuracy-resource tradeoffs.
Abstract
Inaccurate circuits make possible the conservation of limited resources, such as energy. But effective design of such circuits requires an understanding of resulting tradeoffs between accuracy and design parameters, such as voltages and speed of execution. Although studies of tradeoffs have been done on specific circuits, the applicability of those studies is narrow. This paper presents a comprehensive and mathematically rigorous method for analyzing a large class of inaccurate circuits for addition. Furthermore, it presents new, fast algorithms for the computation of key statistical measures of inaccuracy in such adders, thus helping hardware architects explore the design space with greater confidence.
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Taxonomy
TopicsLow-power high-performance VLSI design · Parallel Computing and Optimization Techniques · Embedded Systems Design Techniques
