Hardware Decoders for Polar Codes: An Overview
Pascal Giard, Gabi Sarkis, Alexios Balatsoukas-Stimming and, YouZhe Fan, Chi-ying Tsui, Andreas Burg, Claude Thibeault, Warren, J. Gross

TL;DR
This paper reviews various hardware decoder implementations for polar codes, highlighting their advantages in error correction, throughput, and complexity across different decoding algorithms.
Contribution
It provides a comprehensive overview of the state-of-the-art in hardware polar decoders, comparing successive-cancellation, belief propagation, and list decoding methods.
Findings
Successive-cancellation decoders offer low complexity.
List decoders improve error correction performance.
Belief propagation decoders enable parallel processing.
Abstract
Polar codes are an exciting new class of error correcting codes that achieve the symmetric capacity of memoryless channels. Many decoding algorithms were developed and implemented, addressing various application requirements: from error-correction performance rivaling that of LDPC codes to very high throughput or low-complexity decoders. In this work, we review the state of the art in polar decoders implementing the successive-cancellation, belief propagation, and list decoding algorithms, illustrating their advantages.
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