Attack resilient architecture to replace embedded Flash with STTRAM in homogeneous IoTs
Asmit De, Mohammad Nasim Imtiaz Khan, Swaroop Ghosh

TL;DR
This paper proposes a resilient IoT memory architecture replacing embedded Flash with STTRAM, leveraging network redundancy to recover from security attacks, thus enhancing power efficiency and attack resilience in embedded IoT systems.
Contribution
It introduces a novel attack-resilient memory architecture for IoT that uses peer-to-peer redundancy to recover from attacks on STTRAM-based memory.
Findings
Demonstrates successful attack recovery with acceptable latency.
Shows energy overhead is manageable during recovery.
Validates architecture on commercial IoT boards.
Abstract
Spin-Transfer Torque RAM (STTRAM) is an emerging Non-Volatile Memory (NVM) technology that provides better endurance, write energy and performance than traditional NVM technologies such as Flash. In embedded application such as microcontroller SoC of Internet of Things (IoT), embedded Flash (eFlash) is widely employed. However, eFlash is also associated with cost. Therefore, replacing eFlash with STTRAM is desirable in IoTs for power-efficiency. Although promising, STTRAM brings several new security and privacy challenges that pose a significant threat to sensitive data in memory. This is inevitable due to the underlying dependency of this memory technology on environmental parameters such as temperature and magnetic fields that can be exploited by an adversary to tamper with the program and data. In this paper, we investigate these attacks and propose a novel memory architecture for…
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Taxonomy
TopicsAdvanced Memory and Neural Computing · Physical Unclonable Functions (PUFs) and Hardware Security · Neuroscience and Neural Engineering
