P-Type Tunnel FETs With Triple Heterojunctions

TL;DR

This paper introduces a triple-heterojunction design for p-type InAs/GaSb tunnel FETs, significantly enhancing tunneling efficiency and device performance through innovative heterojunction engineering.

Contribution

The study presents a novel triple-heterojunction structure that improves tunneling probability and reduces leakage in p-type tunnel FETs, outperforming previous designs and silicon MOSFETs.

Findings

Achieved high ON current of 582A/m at 30nm channel length.

Significantly improved turn-on characteristics and delayed saturation.

Comparable or superior performance to n-type 3HJ counterparts.

Abstract

A triple-heterojunction (3HJ) design is employed to improve p-type InAs/GaSb heterojunction (HJ) tunnel FETs. The added two HJs (AlInAsSb/InAs in the source and GaSb/AlSb in the channel) significantly shorten the tunnel distance and create two resonant states, greatly improving the ON state tunneling probability. Moreover, the source Fermi degeneracy is reduced by the increased source (AlInAsSb) density of states and the OFF state leakage is reduced by the heavier channel (AlSb) hole effective masses. Quantum ballistic transport simulations show, that with V_{DD} = 0.3V and I_{OFF} = 10^{-3}A/m, I_{ON} of 582A=m (488A=m) is obtained at 30nm (15nm) channel length, which is comparable to n-type 3HJ counterpart and significantly exceeding p-type silicon MOSFET. Simultaneously, the nonlinear turn on and delayed saturation in the output characteristics are also greatly improved.