Kalman Filter Tracking on Parallel Architectures

TL;DR

This paper discusses adapting Kalman Filter-based track reconstruction algorithms for parallel architectures like Xeon Phi to improve computational efficiency in particle physics experiments.

Contribution

It presents progress in fully parallelizing and vectorizing Kalman Filter algorithms for end-to-end track reconstruction on modern multi-core and many-core architectures.

Findings

Achieved significant speedups in track fitting with optimized data structures.

Demonstrated initial success in parallelizing track building algorithms.

Progressed towards a fully parallelized end-to-end track reconstruction pipeline.

Abstract

Power density constraints are limiting the performance improvements of modern CPUs. To address this we have seen the introduction of lower-power, multi-core processors such as GPGPU, ARM and Intel MIC. To stay within the power density limits but still obtain Moore's Law performance/price gains, it will be necessary to parallelize algorithms to exploit larger numbers of lightweight cores and specialized functions like large vector units. Track finding and fitting is one of the most computationally challenging problems for event reconstruction in particle physics. At the High-Luminosity Large Hadron Collider (HL-LHC), for example, this will be by far the dominant problem. The need for greater parallelism has driven investigations of very different track finding techniques such as Cellular Automata or Hough Transforms. The most common track finding techniques in use today, however, are those based on the Kalman Filter. Significant experience has been accumulated with these techniques on real tracking detector systems, both in the trigger and offline. They are known to provide high physics performance, are robust, and are in use today at the LHC. We report on porting these algorithms to new parallel architectures. Our previous investigations showed that, using optimized data structures, track fitting with a Kalman Filter can achieve large speedups both with Intel Xeon and Xeon Phi. Additionally, we have previously shown first attempts at track building with some speedup. We report here our progress towards an end-to-end track reconstruction algorithm fully exploiting vectorization and parallelization techniques in a simplified experimental environment.