$d$-imbalance WOM Codes for Reduced Inter-Cell Interference in Multi-Level NVMs

TL;DR

This paper introduces $d$-imbalance WOM codes for multi-level NVMs to reduce inter-cell interference, providing a new construction, optimal bounds, and demonstrating improved error rates in flash memory applications.

Contribution

It proposes a novel $d$-imbalance WOM code construction for multi-level NVMs, with proven optimality and practical deployment insights.

Findings

The codes effectively reduce inter-cell interference in multi-level NVMs.

The proposed construction is optimal in terms of write count.

Deployment within flash wordlines shows significant BER improvements.

Abstract

In recent years, due to the spread of multi-level non-volatile memories (NVM), $q$-ary write-once memories (WOM) codes have been extensively studied. By using WOM codes, it is possible to rewrite NVMs $t$ times before erasing the cells. The use of WOM codes enables to improve the performance of the storage device, however, it may also increase errors caused by inter-cell interference (ICI). This work presents WOM codes that restrict the imbalance between code symbols throughout the write sequence, hence decreasing ICI. We first specify the imbalance model as a bound $d$ on the difference between codeword levels. Then a $2$-cell code construction for general $q$ and input size is proposed. An upper bound on the write count is also derived, showing the optimality of the proposed construction. In addition to direct WOM constructions, we derive closed-form optimal write regions for codes constructed with continuous lattices. On the coding side, the proposed codes are shown to be competitive with known codes not adhering to the bounded imbalance constraint. On the memory side, we show how the codes can be deployed within flash wordlines, and quantify their BER advantage using accepted ICI models.