Formal Modelling, Testing and Verification of HSA Memory Models using Event-B
Ashish Darbari, Iain Singleton, Michael Butler, John Colley

TL;DR
This paper presents a formal, Event-B-based model of the HSA memory architecture, enabling rigorous verification and testing of hardware and software implementations to ensure correctness and compliance.
Contribution
It introduces a hierarchical, refinement-based formal modeling approach for HSA memory models, combined with automated validation and test generation methods.
Findings
Verified the model using proofs in the Rodin tool
Developed automated baseline compliance testing with litmus tests
Created a coverage-driven test extraction method for regression testing
Abstract
The HSA Foundation has produced the HSA Platform System Architecture Specification that goes a long way towards addressing the need for a clear and consistent method for specifying weakly consistent memory. HSA is specified in a natural language which makes it open to multiple ambiguous interpretations and could render bugs in implementations of it in hardware and software. In this paper we present a formal model of HSA which can be used in the development and verification of both concurrent software applications as well as in the development and verification of the HSA-compliant platform itself. We use the Event-B language to build a provably correct hierarchy of models from the most abstract to a detailed refinement of HSA close to implementation level. Our memory models are general in that they represent an arbitrary number of masters, programs and instruction interleavings. We…
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Taxonomy
TopicsFormal Methods in Verification · Embedded Systems Design Techniques · Real-Time Systems Scheduling
