Open Packet Processor: a programmable architecture for wire speed platform-independent stateful in-network processing

TL;DR

The paper introduces the Open Packet Processor (OPP), a hardware prototype demonstrating platform-independent, stateful, wire-speed packet processing using eXtended Finite State Machines, enabling flexible in-network data plane programmability.

Contribution

It presents a novel hardware architecture and programming abstraction (XFSM) for platform-independent, stateful in-network processing at wire speed, validated through a prototype implementation.

Findings

Supports stateful operations like token bucket and traffic classification

Achieves platform independence by decoupling hardware primitives from application logic

Operates within a bounded number of clock cycles for real-time processing

Abstract

This paper aims at contributing to the ongoing debate on how to bring programmability of stateful packet processing tasks inside the network switches, while retaining platform independency. Our proposed approach, named "Open Packet Processor" (OPP), shows the viability (via an hardware prototype relying on commodity HW technologies and operating in a strictly bounded number of clock cycles) of eXtended Finite State Machines (XFSM) as low-level data plane programming abstraction. With the help of examples, including a token bucket and a C4.5 traffic classifier based on a binary tree, we show the ability of OPP to support stateful operation and flow-level feature tracking. Platform independence is accomplished by decoupling the implementation of hardware primitives (registries, conditions, update instructions, forwarding actions, matching facilities) from their usage by an application formally described via an abstract XFSM. We finally discuss limitations and extensions.