The Effect of Multi-core Communication Architecture on System Performance

TL;DR

This paper investigates how different multi-core communication architectures impact system performance, focusing on FPGA-based soft-core implementations and their influence on parallel program efficiency.

Contribution

It provides an analysis of various connection topologies in multi-core FPGA systems and their effects on performance and energy consumption.

Findings

Different topologies significantly affect system performance.

Communication architecture influences energy efficiency.

Parallel program performance varies with connection topology.

Abstract

MPSoCs are gaining popularity because of its potential to solve computationally expensive applications. A multi-core processor combines two or more independent cores (normally a CPU) into a single package composed of a single integrated circuit (Chip). However, as the number of components on a single chip and their performance continue to increase, a shift from computation-based to communication-based design becomes mandatory. As a result, the communication architecture plays a major role in the area, performance, and energy consumption of the overall system. In this paper, multiple soft-cores (IPs) such as Micro Blaze in an FPGA is used to study the effect of different connection topologies on the performance of a parallel program.