A New Learning Method for Inference Accuracy, Core Occupation, and Performance Co-optimization on TrueNorth Chip

TL;DR

This paper introduces a novel learning method for the IBM TrueNorth neuromorphic chip that improves inference accuracy and core utilization by reducing the need for multiple copies, leading to significant speedups.

Contribution

The proposed method constrains variance in computations to reduce the number of copies needed, enhancing efficiency and accuracy on TrueNorth.

Findings

Achieves up to 68.8% reduction in required cores

Provides 6.5X speedup over existing methods

Maintains or slightly improves inference accuracy

Abstract

IBM TrueNorth chip uses digital spikes to perform neuromorphic computing and achieves ultrahigh execution parallelism and power efficiency. However, in TrueNorth chip, low quantization resolution of the synaptic weights and spikes significantly limits the inference (e.g., classification) accuracy of the deployed neural network model. Existing workaround, i.e., averaging the results over multiple copies instantiated in spatial and temporal domains, rapidly exhausts the hardware resources and slows down the computation. In this work, we propose a novel learning method on TrueNorth platform that constrains the random variance of each computation copy and reduces the number of needed copies. Compared to the existing learning method, our method can achieve up to 68.8% reduction of the required neuro-synaptic cores or 6.5X speedup, with even slightly improved inference accuracy.