Development of an ADC Radiation Tolerance Characterization System for the Upgrade of the ATLAS LAr Calorimeter
Hongbin Liu, Hucheng Chen, Kai Chen, James Kierstead, Francesco Lanni,, Helio Takai, Ge Jin

TL;DR
This paper presents a custom radiation tolerance characterization system for high-speed ADCs, enabling evaluation of commercial ADCs for the ATLAS LAr calorimeter upgrade and other radiation-sensitive collider experiments.
Contribution
The development of a versatile, custom ADC radiation tolerance testing system tailored for high-speed, multi-channel ADCs used in collider physics upgrades.
Findings
Test system successfully evaluated radiation tolerance of ADCs
Demonstrated system's effectiveness for ATLAS LAr calorimeter upgrade
Applicable to other collider experiments requiring radiation-hardened electronics
Abstract
ATLAS LAr calorimeter will perform its Phase-I upgrade during the long shut down (LS2) in 2018, a new LAr Trigger Digitizer Board (LTDB) will be designed and installed. Several commercial-off-the-shelf (COTS) multichannel high-speed ADCs have been selected as possible backups of the radiation tolerant ADC ASICs for LTDB. In order to evaluate the radiation tolerance of these back up commercial ADCs, we developed an ADC radiation tolerance characterization system, which includes the ADC boards, data acquisition (DAQ) board, signal generator, external power supplies and a host computer. The ADC board is custom designed for different ADCs, which has ADC driver and clock distribution circuits integrated on board. The Xilinx ZC706 FPGA development board is used as DAQ board. The data from ADC are routed to the FPGA through the FMC (FPGA Mezzanine Card) connector, de-serialized and monitored…
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