LLR-based Successive-Cancellation List Decoder for Polar Codes with Multi-bit Decision
Bo Yuan, Keshab K. Parhi

TL;DR
This paper introduces a novel LLR-based SCL decoding algorithm for polar codes that enables multi-bit decisions, significantly reducing hardware area and latency while maintaining high error-correcting performance.
Contribution
It proposes the first LLR-2Kb-SCL decoding algorithm with multi-bit decision capability and optimized hardware architecture for polar codes.
Findings
Achieves significant reduction in area and latency compared to prior decoders.
Hardware efficiency is increased by factors of 2.33 and 3.32 for K=2 and 3.
Demonstrates improved performance for (1024, 512) polar code with list size 4.
Abstract
Due to their capacity-achieving property, polar codes have become one of the most attractive channel codes. To date, the successive cancellation list (SCL) decoding algorithm is the primary approach that can guarantee outstanding error-correcting performance of polar codes. However, the hardware designs of the original SCL decoder have large silicon area and long decoding latency. Although some recent efforts can reduce either the area or latency of SCL decoders, these two metrics still cannot be optimized at the same time. This paper, for the first time, proposes a general log-likelihood-ratio (LLR)-based SCL decoding algorithm with multi-bit decision. This new algorithm, referred as LLR-2Kb-SCL, can determine 2K bits simultaneously for arbitrary K with the use of LLR messages. In addition, a reduced-data-width scheme is presented to reduce the critical path of the sorting block. Then,…
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