Effective use of the PGAS Paradigm: Driving Transformations and Self-Adaptive Behavior in DASH-Applications

TL;DR

This paper presents a hierarchical units mapping technique for DASH, a PGAS-based library for HPC, which improves application performance by exploiting hardware topology and enables future automatic transformations.

Contribution

It introduces an automatic hierarchical units mapping method using Hilbert curve transformation for DASH applications on HPC systems.

Findings

Latency improved in 3D stencil benchmarks

Mapping technique is generic and adaptable to different hardware

Enables future automatic transformations and optimizations

Abstract

DASH is a library of distributed data structures and algorithms designed for running the applications on modern HPC architectures, composed of hierarchical network interconnections and stratified memory. DASH implements a PGAS (partitioned global address space) model in the form of C++ templates, built on top of DART -- a run-time system with an abstracted tier above existing one-sided communication libraries. In order to facilitate the application development process for exploiting the hierarchical organization of HPC machines, DART allows to reorder the placement of the computational units. In this paper we present an automatic, hierarchical units mapping technique (using a similar approach to the Hilbert curve transformation) to reorder the placement of DART units on the Cray XC40 machine Hazel Hen at HLRS. To evaluate the performance of new units mapping which takes into the account the topology of allocated compute nodes, we perform latency benchmark for a 3D stencil code. The technique of units mapping is generic and can be be adopted in other DART communication substrates and on other hardware platforms. Furthermore, high--level features of DASH are presented, enabling more complex automatic transformations and optimizations in the future.