Fast Control Latency Uncertainty Elimination for the BESIII ETOF Upgrade

TL;DR

This paper presents a method to eliminate transfer latency uncertainty in the BESIII ETOF upgrade using FPGA-embedded TDC, improving control precision with a flexible and easily calibratable approach.

Contribution

It introduces a novel latency uncertainty elimination technique based on FPGA TDC re-capturing, enhancing control accuracy for BESIII ETOF electronics.

Findings

Effective elimination of transfer latency uncertainty demonstrated in field tests.

Method offers flexible structure, easy calibration, and good adaptability.

Significant improvement over existing BTOF control methods.

Abstract

A new fanning topology is proposed to precisely fan out fast control signals in the Beijing Spectrometer (BES III) end-cap time-of-flight (ETOF) electronics. However, uncertainty in transfer latency is introduced by the new fanning channel, which will degrade the precision of fast control. In this paper, latency uncertainty elimination for the BESIII ETOF upgrade is introduced. The latency uncertainty is determined by a Time-Digital-Converter (TDC) embedded in a Field-Programmable Gate Array (FPGA) and is eliminated by re-capturing at synchronous and determinate time. Compared with the existing method of Barrel-cap TOF (BTOF), it has advantages of flexible structure, easy calibration and good adaptability. Field tests on the BES III ETOF system show that this method effectively eliminates transfer latency uncertainty.