Simulation Study of an Energy-Efficient Time Synchronization Scheme based on Source Clock Frequency Recovery in Asymmetric Wireless Sensor Networks

TL;DR

This paper presents a simulation study of an energy-efficient time synchronization scheme for asymmetric wireless sensor networks, focusing on reducing sensor node energy consumption through source clock frequency recovery.

Contribution

It introduces a novel synchronization scheme based on SCFR tailored for battery-powered sensor nodes in asymmetric WSNs, demonstrating its feasibility through simulations.

Findings

Reduced energy consumption at sensor nodes.

Effective synchronization with minimal message exchanges.

Feasibility confirmed through simulation results.

Abstract

In this paper we report preliminary results of a simulation study on an energy-efficient time synchronization scheme based on source clock frequency recovery (SCFR) at sensor nodes in asymmetric wireless sensor networks (WSNs), where a head node --- serving as a gateway between wired and wireless networks --- is equipped with a powerful processor and supplied power from outlet, and sensor nodes --- connected only through wireless channels --- are limited in processing and battery-powered. In the SCFR-based WSN time synchronization scheme, we concentrate on battery-powered sensor nodes and reduce their energy consumption by minimizing the number of message transmissions from sensor nodes to the head node. Through simulation experiments we analyze the performance of the SCFR-based WSN time synchronization scheme, including the impact of SCFR on time synchronization based on two-way message exchange, and demonstrate the feasibility of the proposed time synchronization scheme.