On Scaling Rules for Energy of VLSI Polar Encoders and Decoders

TL;DR

This paper establishes fundamental energy lower bounds for VLSI polar encoders and decoders, showing that energy scales at least as the 1.5 power of block length, and provides near-optimal designs approaching these bounds.

Contribution

It derives the first rigorous energy lower bounds for VLSI polar encoding and decoding, and demonstrates near-optimal circuit implementations matching these bounds up to polylogarithmic factors.

Findings

Energy of polar encoders/decoders scales as at least N^{3/2}.

Mesh network implementations can achieve near-bound energy efficiency.

Energy scales polynomially with the reciprocal gap to capacity, with specific exponents provided.

Abstract

It is shown that all polar encoding schemes of rate $R>\frac{1}{2}$ of block length $N$ implemented according to the Thompson VLSI model must take energy $E\ge\Omega\left(N^{3/2}\right)$. This lower bound is achievable up to polylogarithmic factors using a mesh network topology defined by Thompson and the encoding algorithm defined by Arikan. A general class of circuits that compute successive cancellation decoding adapted from Arikan's butterfly network algorithm is defined. It is shown that such decoders implemented on a rectangle grid for codes of rate $R>2/3$ must take energy $E\ge\Omega(N^{3/2})$, and this can also be reached up to polylogarithmic factors using a mesh network. Capacity approaching sequences of energy optimal polar encoders and decoders, as a function of reciprocal gap to capacity $\chi = (1-R/C)^{-1}$, have energy that scales as $\Omega\left(\chi^{5.325}\right)\le E \le O\left(\chi^{7.05}\log^{4}\left(\chi\right)\right)$.