Side-gate leakage and field emission in all-graphene field effect transistors on SiO2/Si substrate

TL;DR

This paper reports on the fabrication and analysis of all-graphene field-effect transistors with self-aligned side-gates, revealing leakage mechanisms and field emission behaviors crucial for device miniaturization.

Contribution

It introduces a novel fabrication method for all-graphene FETs with self-aligned side-gates and provides detailed insights into leakage and field emission mechanisms.

Findings

Side-gate modulation of 35% at 1V

Leakage current rapidly increases above 15V

Field emission current density reaches 1μA/μm

Abstract

We fabricate planar all-graphene field-effect transistors with self-aligned side-gates at 100 nm from the main graphene conductive channel, using a single lithographic step. We demonstrate side-gating below 1V with conductance modulation of 35% and transconductance up to 0.5 mS/mm at 10 mV drain bias. We measure the planar leakage along the SiO2/vacuum gate dielectric over a wide voltage range, reporting rapidly growing current above 15 V. We unveil the microscopic mechanisms driving the leakage, as Frenkel-Poole transport through SiO2 up to the activation of Fowler-Nordheim tunneling in vacuum, which becomes dominant at high voltages. We report a field-emission current density as high as 1uA/um between graphene flakes. These findings are essential for the miniaturization of atomically thin devices.