Fast Power and Energy Efficiency Analysis of FPGA-based Wireless Base-band Processing

TL;DR

This paper presents a rapid, high-level power estimation method for FPGA-based wireless communication systems, enabling efficient design space exploration and energy optimization before implementation.

Contribution

It introduces a high-level modeling approach for fast power estimation of FPGA-based systems, improving design efficiency in wireless communication applications.

Findings

The method provides accurate power estimates prior to hardware implementation.

Design space exploration is significantly accelerated using high-level simulations.

The approach is validated through a typical wireless communication system case study.

Abstract

Nowadays, demands for high performance keep on increasing in the wireless communication domain. This leads to a consistent rise of the complexity and designing such systems has become a challenging task. In this context, energy efficiency is considered as a key topic, especially for embedded systems in which design space is often very constrained. In this paper, a fast and accurate power estimation approach for FPGA-based hardware systems is applied to a typical wireless communication system. It aims at providing power estimates of complete systems prior to their implementations. This is made possible by using a dedicated library of high-level models that are representative of hardware IPs. Based on high-level simulations, design space exploration is made a lot faster and easier. The definition of a scenario and the monitoring of IP's time-activities facilitate the comparison of several domain-specific systems. The proposed approach and its benefits are demonstrated through a typical use case in the wireless communication domain.