ePlace-3D: Electrostatics based Placement for 3D-ICs
Jingwei Lu, Hao Zhuang, Ilgweon Kang, Pengwen Chen, Chung-Kuan, Cheng

TL;DR
ePlace-3D introduces a novel electrostatics-based placement algorithm for 3D-ICs that improves wirelength and reduces vertical interconnects through advanced nonlinear optimization techniques.
Contribution
It presents a new 3D placement method with electrostatics-based density modeling, spectral solution improvements, and interleaved 2D-3D placement for better efficiency and scalability.
Findings
Achieves 6.44% shorter wirelength compared to mPL6-3D.
Reduces vertical interconnects by 10.27% on average.
Demonstrates high performance on large-scale 3D circuits.
Abstract
We propose a flat, analytic, mixed-size placement algorithm ePlace-3D for three-dimension integrated circuits (3D-ICs) using nonlinear optimization. Our contributions are (1) electrostatics based 3D density function with globally uniform smoothness (2) 3D numerical solution with improved spectral formulation (3) 3D nonlinear pre-conditioner for convergence acceleration (4) interleaved 2D-3D placement for efficiency enhancement. Our placer outperforms the leading work mPL6-3D and NTUplace3-3D with 6.44% and 37.15% shorter wirelength, 9.11% and 10.27% fewer 3D vertical interconnects (VI) on average of IBM-PLACE circuits. Validation on the large-scale modern mixed-size (MMS) 3D circuits shows high performance and scalability.
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