Optical Crossbars on Chip: a comparative study based on worst-case losses

TL;DR

This paper compares the worst-case optical losses of various on-chip optical crossbar implementations, considering topology, layout, and fabrication losses, to aid system designers in selecting suitable designs for different core counts and chip sizes.

Contribution

It provides a comparative analysis of worst-case losses across different optical crossbar designs based on key design factors, aiding informed selection.

Findings

Different topologies and layouts significantly affect worst-case losses.

Fabrication-induced injection losses impact overall optical performance.

The study offers guidelines for choosing optimal crossbar designs based on system requirements.

Abstract

The many cores design research community have shown high interest in optical crossbars on chip for more than a decade. Key properties of optical crossbars, namely a) contention free data routing b) low latency communication and c) potential for high bandwidth through the use of WDM, motivate several implementations of this type of interconnect. These implementations demonstrate very different scalability and power efficiency ability depending on three key design factors: a) the network topology, b) the considered layout and the c) the injection losses induced by the fabrication process. In this paper, the worst-case optical losses of crossbar implementations are compared according to the factors mentioned above. The comparison results has the potential to help many cores system designer to select the most appropriate crossbar implementation according, for instance, to the number of IP cores and the chip die size.