Distributed Phasers

TL;DR

This paper introduces a highly concurrent, scalable distributed phaser design using skip lists, enabling dynamic task synchronization with efficient structural modifications verified through model checking.

Contribution

It presents a novel distributed phaser implementation employing skip lists and a two-phase modification process, verified for correctness with SPIN model checker.

Findings

Synchronization cost scales logarithmically with tasks.

Distributed phaser supports dynamic addition and deletion of tasks.

Model checking confirms correctness of the design.

Abstract

A phaser is an expressive synchronization construct that unifies collective and point-to-point coordination with dynamic task parallelism. Each task can participate in a phaser as a signaler, a waiter, or both. The participants in a phaser may change over time as dynamic tasks are added and deleted. In this poster, we present a highly concurrent and scalable design of phasers for a distributed memory environment that is suitable for use with asynchronous partitioned global address space programming models. Our design for a distributed phaser employs a pair of skip lists augmented with the ability to collect and propagate synchronization signals. To enable a high degree of concurrency, addition and deletion of participant tasks are performed in two phases: a "fast single-link-modify" step followed by multiple hand-overhand "lazy multi-link-modify" steps. We show that the cost of synchronization and structural operations on a distributed phaser scales logarithmically, even in the presence of concurrent structural modifications. To verify the correctness of our design for distributed phasers, we employ the SPIN model checker. To address this issue of state space explosion, we describe how we decompose the state space to separately verify correct handling for different kinds of messages, which enables complete model checking of our phaser design.