High-Performance Computing with Quantum Processing Units

TL;DR

This paper explores how quantum processing units can be integrated into high-performance computing systems, analyzing different architectures, challenges, and the importance of quantum interconnects for performance.

Contribution

It introduces two integration pathways for QPUs in HPC systems and discusses the impact of quantum interconnects and new performance metrics.

Findings

Performance depends on quantum interconnect quality

Two integration pathways identified: tight and loose

Challenges in assessing QPU performance for HPC

Abstract

The prospects of quantum computing have driven efforts to realize fully functional quantum processing units (QPUs). Recent success in developing proof-of-principle QPUs has prompted the question of how to integrate these emerging processors into modern high-performance computing (HPC) systems. We examine how QPUs can be integrated into current and future HPC system architectures by accounting for functional and physical design requirements. We identify two integration pathways that are differentiated by infrastructure constraints on the QPU and the use cases expected for the HPC system. This includes a tight integration that assumes infrastructure bottlenecks can be overcome as well as a loose integration that assumes they cannot. We find that the performance of both approaches is likely to depend on the quantum interconnect that serves to entangle multiple QPUs. We also identify several challenges in assessing QPU performance for HPC, and we consider new metrics that capture the interplay between system architecture and the quantum parallelism underlying computational performance.