Analysis of Intel's Haswell Microarchitecture Using The ECM Model and Microbenchmarks
Johannes Hofmann, Dietmar Fey, Jan Eitzinger, Georg Hager, Gerhard, Wellein

TL;DR
This paper provides a detailed analysis of Intel's Haswell microarchitecture, using the ECM model and microbenchmarks to quantify its efficiency and improvements in features like the Uncore design, memory hierarchy, and execution units.
Contribution
It introduces a comprehensive evaluation of Haswell's microarchitecture features using the ECM model and a standardized set of microbenchmarks for streaming loop kernels.
Findings
Quantified the impact of dual-ring Uncore design
Assessed the effects of Cluster-on-Die mode and Uncore Frequency Scaling
Provided a blueprint for analyzing streaming loop kernels
Abstract
This paper presents an in-depth analysis of Intel's Haswell microarchitecture for streaming loop kernels. Among the new features examined is the dual-ring Uncore design, Cluster-on-Die mode, Uncore Frequency Scaling, core improvements as new and improved execution units, as well as improvements throughout the memory hierarchy. The Execution-Cache-Memory diagnostic performance model is used together with a generic set of microbenchmarks to quantify the efficiency of the microarchitecture. The set of microbenchmarks is chosen such that it can serve as a blueprint for other streaming loop kernels.
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
TopicsParallel Computing and Optimization Techniques · Embedded Systems Design Techniques · Advanced Data Storage Technologies
