Implications of Burn-In Stress on NBTI Degradation

TL;DR

This paper investigates how burn-in stress accelerates NBTI degradation in CMOS circuits, specifically analyzing its impact on device mismatch and circuit failure in a DAC, with simulation and experimental validation.

Contribution

It provides the first detailed analysis of burn-in's effect on NBTI in analogue circuits, highlighting the risk of threshold mismatch and circuit failure.

Findings

Severe burn-in stress causes significant NBTI-induced threshold mismatches.

Simulation and experiments confirm burn-in's impact on DAC performance.

Threshold mismatch can exceed design limits under severe stress.

Abstract

Burn-in is accepted as a way to evaluate ageing effects in an accelerated manner. It has been suggested that burn-in stress may have a significant effect on the Negative Bias Temperature Instability (NBTI) of subthreshold CMOS circuits. This paper analyses the effect of burn-in on NBTI in the context of a Digital to Analogue Converter (DAC) circuit. Analogue circuits require matched device pairs; NBTI may cause mismatches and hence circuit failure. The NBTI degradation observed in the simulation analysis indicates that under severe stress conditions, a significant voltage threshold mismatch in the DAC beyond the design specification of 2 mV limit can result. Experimental results confirm the sensitivity of the DAC circuit design to NBTI resulting from burn-in.