Hardware Impairments Aware Transceiver for Full-Duplex Massive MIMO Relaying

TL;DR

This paper introduces a hardware impairments aware transceiver scheme for full-duplex massive MIMO relaying, addressing hardware distortion effects and optimizing spectral efficiency with joint power and degree of freedom optimization.

Contribution

It proposes a novel low-complexity transceiver scheme that mitigates hardware impairments in massive MIMO relaying systems, enhancing spectral efficiency.

Findings

HIA scheme effectively mitigates the ceiling effect caused by hardware impairments.

Joint optimization improves spectral efficiency significantly.

Scaling antennas at sources and destinations enhances performance.

Abstract

This paper studies the massive MIMO full-duplex relaying (MM-FDR), where multiple source-destination pairs communicate simultaneously with the help of a common full-duplex relay equipped with very large antenna arrays. Different from the traditional MM-FDR protocol, a general model where sources/destinations are allowed to equip with multiple antennas is considered. In contrast to the conventional MIMO system, massive MIMO must be built with low-cost components which are prone to hardware impairments. In this paper, the effect of hardware impairments is taken into consideration, and is modeled using transmit/receive distortion noises. We propose a low complexity hardware impairments aware transceiver scheme (named as HIA scheme) to mitigate the distortion noises by exploiting the statistical knowledge of channels and antenna arrays at sources and destinations. A joint degree of freedom and power optimization algorithm is presented to further optimize the spectral efficiency of HIA based MM-FDR. The results show that the HIA scheme can mitigate the "ceiling effect" appears in traditional MM-FDR protocol, if the numbers of antennas at sources and destinations can scale with that at the relay.