A Reconfigurable Mixed-signal Implementation of a Neuromorphic ADC

TL;DR

This paper introduces a reconfigurable neuromorphic ADC that employs integrate-and-fire neurons and FPGA control, using pulse width modulation for lateral inhibition to improve spike train decoherence, demonstrated through simulations.

Contribution

It presents a novel reconfigurable neuromorphic ADC architecture combining analogue neurons with FPGA control and pulse width modulation for lateral inhibition.

Findings

Robustness to fixed random noise demonstrated in software simulations.

Feasibility shown with circuit simulation of ten neurons.

Reconfigurability enabled by FPGA implementation.

Abstract

We present a neuromorphic Analogue-to-Digital Converter (ADC), which uses integrate-and-fire (I&F) neurons as the encoders of the analogue signal, with modulated inhibitions to decohere the neuronal spikes trains. The architecture consists of an analogue chip and a control module. The analogue chip comprises two scan chains and a twodimensional integrate-and-fire neuronal array. Individual neurons are accessed via the chains one by one without any encoder decoder or arbiter. The control module is implemented on an FPGA (Field Programmable Gate Array), which sends scan enable signals to the scan chains and controls the inhibition for individual neurons. Since the control module is implemented on an FPGA, it can be easily reconfigured. Additionally, we propose a pulse width modulation methodology for the lateral inhibition, which makes use of different pulse widths indicating different strengths of inhibition for each individual neuron to decohere neuronal spikes. Software simulations in this paper tested the robustness of the proposed ADC architecture to fixed random noise. A circuit simulation using ten neurons shows the performance and the feasibility of the architecture.