In-Line-Test of Variability and Bit-Error-Rate of HfOx-Based Resistive Memory

TL;DR

This paper investigates the variability and bit-error-rate of HfOx-based RRAM through in-line testing, providing a method to evaluate and optimize memory performance during manufacturing and design.

Contribution

It introduces a novel in-line-test method to derive bit-error-rates from variability data, aiding in technology assessment and product design optimization.

Findings

Manufacturing variability characterized at multiple levels.

A new method to derive BER from in-line-test data.

BER can guide design margins and error correction strategies.

Abstract

Spatial and temporal variability of HfOx-based resistive random access memory (RRAM) are investigated for manufacturing and product designs. Manufacturing variability is characterized at different levels including lots, wafers, and chips. Bit-error-rate (BER) is proposed as a holistic parameter for the write cycle resistance statistics. Using the electrical in-line-test cycle data, a method is developed to derive BERs as functions of the design margin, to provide guidance for technology evaluation and product design. The proposed BER calculation can also be used in the off-line bench test and build-in-self-test (BIST) for adaptive error correction and for the other types of random access memories.