Designing Hardware/Software Systems for Embedded High-Performance Computing

TL;DR

This paper presents an automated design methodology for high-performance embedded computing systems on FPGA, focusing on a many-core architecture that simplifies hardware design while maintaining strong performance.

Contribution

It introduces an automated architecture generation approach and a system-level design methodology for FPGA-based embedded high-performance computing.

Findings

Achieved efficient dense matrix multiplication performance on FPGA

Demonstrated effective sparse matrix-vector multiplication

Validated the approach on ZYNQ-7020 FPGA platform

Abstract

In this work, we propose an architecture and methodology to design hardware/software systems for high-performance embedded computing on FPGA. The hardware side is based on a many-core architecture whose design is generated automatically given a set of architectural parameters. Both the architecture and the methodology were evaluated running dense matrix multiplication and sparse matrix-vector multiplication on a ZYNQ-7020 FPGA platform. The results show that using a system-level design of the system avoids complex hardware design and still provides good performance results.