Bufferless NOC Simulation of Large Multicore System on GPU Hardware

TL;DR

This paper presents a GPU-accelerated bufferless interconnection network simulator for large multicore systems, demonstrating significant speedup and potential power savings in chip design.

Contribution

It introduces a novel GPU-compatible parallel simulator for bufferless multicore interconnects, enabling large-scale system simulation with high efficiency.

Findings

Simulated systems with up to 43,000 cores.

Achieved up to 25x speedup on GPU.

Potential for reduced power consumption.

Abstract

Last level cache management and core interconnection network play important roles in performance and power consumption in multicore system. Large scale chip multicore uses mesh interconnect widely due to scalability and simplicity of the mesh interconnection design. As interconnection network occupied significant area and consumes significant percent of system power, bufferless network is an appealing alternative design to reduce power consumption and hardware cost. We have designed and implemented a simulator for simulation of distributed cache management of large chip multicore where cores are connected using bufferless interconnection network. Also, we have redesigned and implemented the our simulator which is a GPU compatible parallel version of the same simulator using CUDA programming model. We have simulated target large chip multicore with up to 43,000 cores and achieved up to 25 times speedup on NVIDIA GeForce GTX 690 GPU over serial simulation.