Gate-Voltage Tunability of Plasmons in Single and Multi-layer Graphene Structures: Analytical Description and Concepts for Terahertz Devices

TL;DR

This paper analyzes how gate voltage influences plasmon behavior in single and multi-layer graphene, providing analytical models and design insights for tunable terahertz devices.

Contribution

It offers the first quantitative analysis of gate voltage and dielectric thickness effects on graphene plasmons, including interface trap and quantum capacitance considerations.

Findings

Gate voltage effectively tunes plasmon properties in graphene.

Scaling trends enable intuitive device design.

Optimized gate voltage maximizes plasmon propagation length.

Abstract

The strong light-matter interaction in graphene over a broad frequency range has opened up a plethora of photonics applications of graphene. The goal of this paper is to present the voltage tunability of plasmons in gated single- and multi-layer graphene structures. Device concepts for plasmonic interconnects and antennas and their performance for THz communication are presented. For the first time, the role of gate voltage and the thickness of the gate dielectric on the characteristics of plasmon propagation in graphene are quantified by accounting for both the interface trap capacitance and the quantum capacitance. The gate voltage serves as a powerful knob to tweak the carrier concentration and allows building electrically reconfigurable terahertz devices. By optimizing the gate voltage to maximize the plasmon propagation length in a gated multi-layer graphene geometry, we derive simple scaling trends that give intuitive insight into device modeling and design.