Implementation and verification of different ECC mitigation designs for BRAMs in flash-based FPGAs

TL;DR

This paper investigates ECC-based mitigation strategies for FPGA BRAMs against radiation-induced errors, comparing shortened Hamming and BCH codes through implementation, simulation, and heavy-ion testing.

Contribution

It presents concrete design methods for two ECCs in flash-based FPGAs and evaluates their effectiveness against single event effects.

Findings

Shortened Hamming codes reduce error cross-section by two orders of magnitude.

Shortened BCH codes show no errors in heavy-ion experiments.

Both ECCs improve FPGA BRAM reliability under radiation.

Abstract

Embedded RAM blocks (BRAMs) in field programmable gate arrays (FPGAs) are susceptible to single event effects (SEEs) induced by environmental factors such as cosmic rays, heavy ions, alpha particles and so on. As technology scales, the issue will be more serious. In order to tackle this issue, two different error correcting codes (ECCs), the shortened Hamming codes and shortened BCH codes, are investigated in this paper. The concrete design methods of the codes are presented. Also, the codes are both implemented in flash-based FPGAs. Finally, the synthesis report and simulation results are presented in the paper. Moreover, the heavy-ion experiments are performed, the experimental results indicate that the error cross-section using the shortened Hamming codes can be reduced by two orders of magnitude compared with the device without mitigation, and no errors are discovered in the experiments for the device using the shortened BCH codes.