Future Large-Scale Memristive Device Crossbar Arrays: Limits Imposed by Sneak-Path Currents on Read Operations

TL;DR

This paper investigates the use of intrinsically rectifying memristive devices to mitigate sneak-path currents in large-scale crossbar arrays, providing insights into optimizing read performance and power efficiency.

Contribution

It introduces a Verilog-A model of rectifying memristive devices and systematically evaluates their impact on crossbar array read performance, offering design guidelines.

Findings

Rectification significantly reduces sneak-path currents.

Trade-offs identified between read margin and power consumption.

Model comparison shows advantages of intrinsic rectification.

Abstract

Passive crossbar arrays based upon memristive devices, at crosspoints, hold great promise for the future high-density and non-volatile memories. The most significant challenge facing memristive device based crossbars today is the problem of sneak-path currents. In this paper, we investigate a memristive device with intrinsic rectification behavior to suppress the sneak-path currents in crossbar arrays. The device model is implemented in Verilog-A language and is simulated to match device characteristics readily available in the literature. Then, we systematically evaluate the read operation performance of large-scale crossbar arrays utilizing our proposed model in terms of read margin and power consumption while considering different crossbar sizes, interconnect resistance values, HRS/LRS (High Resistance State/Low Resistance State) values, rectification ratios and different read-schemes. The outcomes of this study are understanding the trade-offs among read margin, power consumption, read-schemes and most importantly providing a guideline for circuit designers to improve the performance of a memory based crossbar structure. In addition, read operation performance comparison of the intrinsic rectifying memristive device model with other memristive device models are studied.