Hybrid Memristor-CMOS (MeMOS) based Logic Gates and Adder Circuits

TL;DR

This paper presents a hybrid Memristor-CMOS (MeMOS) logic circuit for adder design, demonstrating improved area efficiency and performance over traditional CMOS circuits at 1.8 V.

Contribution

It introduces a novel MeMOS-based adder circuit and analyzes its transient response, highlighting advantages over standard CMOS logic in speed, area, and power.

Findings

MeMOS logic shows better area utilization.

The hybrid circuit achieves improved speed and power efficiency.

Transient response analysis confirms enhanced performance.

Abstract

Practical memristor came into picture just few years back and instantly became the topic of interest for researchers and scientists. Memristor is the fourth basic two-terminal passive circuit element apart from well known resistor, capacitor and inductor. Recently, memristor based architectures has been proposed by many researchers. In this paper, we have designed a hybrid Memristor-CMOS (MeMOS) logic based adder circuit that can be used in numerous logic computational architectures. We have also analyzed the transient response of logic gates designed using MeMOS logic circuits. MeMOS use CMOS 180 nm process with memristor to compute boolean logic operations. Various parameters including speed, ares, delay and power dissipation are computed and compared with standard CMOS 180 nm logic design. The proposed logic shows better area utilization and excellent results from existing CMOS logic circuits at standard 1.8 V operating voltage.