A planar Al-Si Schottky Barrier MOSFET operated at cryogenic temperatures

TL;DR

This paper introduces a novel Al-Si Schottky Barrier MOSFET architecture operating at cryogenic temperatures, demonstrating its potential for quantum and superconducting nano-scale devices with a self-aligned, spacerless design.

Contribution

The paper presents a new device architecture with a self-aligned gate overlapping source and drain, enabling sub-5 nm gaps and cryogenic operation as p-MOS Tunnel FETs.

Findings

Device functions as p-MOS Tunnel FET at cryogenic temperatures

No spacers needed due to self-aligned design

Compatible with CMOS and superconducting technologies

Abstract

Schottky Barrier (SB)-MOSFET technology offers intriguing possibilities for cryogenic nano-scale devices, such as Si quantum devices and superconducting devices. We present experimental results on a novel device architecture where the gate electrode is self-aligned with the device channel and overlaps the source and drain electrodes. This facilitates a sub-5 nm gap between the source/drain and channel, and no spacers are required. At cryogenic temperatures, such devices function as p-MOS Tunnel FETs, as determined by the Schottky barrier at the Al-Si interface, and as a further advantage, fabrication processes are compatible with both CMOS and superconducting logic technology.