Lossless Layout Image Compression Algorithms for Electron-Beam Direct-Write Lithography

TL;DR

This paper introduces new lossless compression algorithms tailored for electron-beam lithography layout images, achieving better compression and decoding efficiency to support high data transfer rates in semiconductor manufacturing.

Contribution

It proposes variations of the Corner2 algorithm, named Corner2-EPC and Paeth-EPC, optimized for electron-beam proximity corrected images, balancing compression ratios and decoding speed.

Findings

Most algorithms outperform PNG, Block C4, and LineDiffEntropy in compression.

Algorithms achieve low decoding times and resource usage.

Enhanced data transfer capabilities for electron-beam lithography systems.

Abstract

Electron-beam direct-write (EBDW) lithography systems must in the future transmit terabits of information per second to be viable for commercial semiconductor manufacturing. Lossless layout image compression algorithms with high decoding throughputs and modest decoding resources are tools to address the data transfer portion of the throughput problem. The earlier lossless layout image compression algorithm Corner2 is designed for binary layout images on raster-scanning systems. We propose variations of Corner2 collectively called Corner2-EPC and Paeth-EPC which apply to electron-beam proximity corrected layout images and offer interesting trade-offs between compression ratios and decoding speeds. Most of our algorithms achieve better overall compression performance than PNG, Block C4 and LineDiffEntropy while having low decoding times and resources.