High speed fault tolerant secure communication for muon chamber using fpga based gbt emulator
Suman Sau, Swagata Mandal, Jogender Saini, Amlan Chakrabarti and, Subhasis Chattopadhyay

TL;DR
This paper presents an FPGA-based GBT emulator for high-speed, fault-tolerant, and secure data transmission in high-energy physics experiments, specifically for the CBM experiment's muon detection system.
Contribution
The paper introduces a novel FPGA-based GBT emulator implementing multi-bit error correction and integrated encryption for reliable, secure data transfer in radiation-prone environments.
Findings
Successful implementation of FPGA-based GBT emulator
Enhanced error correction with BCH code
Integrated AES and RSA encryption for security
Abstract
The Compressed Baryonic Matter (CBM) experiment is a part of the Facility for Antiproton and Ion Research (FAIR) in Darmstadt at the GSI. The CBM experiment will investigate the highly compressed nuclear matter using nucleus-nucleus collisions. This experiment will examine heavy-ion collisions in fixed target geometry and will be able to measure hadrons, electrons and muons. CBM requires precise time synchronization, compact hardware, radiation tolerance, self-triggered front-end electronics, efficient data aggregation schemes and capability to handle high data rate (up to several TB/s). As a part of the implementation of read out chain of MUCH in India, we have tried to implement FPGA based emulator of GBTx in India. GBTx is a radiation tolerant ASIC that can be used to implement multipurpose high speed bidirectional optical links for high-energy physics (HEP) experiments and is…
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